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Mikhail Plotnikov

  • Registered on: 03/01/2013
  • Last connection: 05/12/2014

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05/31/2013

01:03 PM GROMACS Feature #1187: Optimized Verlet SIMD kernels for native MIC (Xeon Phi co-processor)
Szilard, as the code has been stabilized I'm going to implement MIC kernels based on the current release-4-6 branch a...

03/24/2013

10:53 AM GROMACS Feature #1187: Optimized Verlet SIMD kernels for native MIC (Xeon Phi co-processor)
Could you please give an approximation for timelines when this feature will be implemented?

03/21/2013

09:21 AM GROMACS Bug #1171: Unsupported heterogeneity of PME ranks
Berk Hess wrote:
> Are there realistic use cases where you would want to mix 1 and 2 OpenMP threads?
> On Intel MIC...

03/19/2013

08:38 PM GROMACS Bug #1171: Unsupported heterogeneity of PME ranks
I guess using threaded code-path is better than application failure anyway, even if this requires communication overh...
01:28 PM GROMACS Bug #1171: Unsupported heterogeneity of PME ranks
I use the same binary, which have OpenMP support, on both nodes. Why cases with nthreads=1 and nthreads>1 should have...
01:17 PM GROMACS Bug #1171: Unsupported heterogeneity of PME ranks
I use the same binary, which have OpenMP support, on both nodes. Why cases with nthreads=1 and nthreads>1 should have...
10:53 AM GROMACS Bug #1171: Unsupported heterogeneity of PME ranks
I have reproduced the problem with latest release-4-6 branch and with 4.6.1. Here is the output you are asking for:
...

03/12/2013

01:59 PM GROMACS Feature #1188 (Closed): Separate timing reports for PP and PME nodes
Please implement separate timing reports for PP and PME nodes in case separate PME nodes are used (-npme option). Cur...
10:08 AM GROMACS Feature #1187 (Closed): Optimized Verlet SIMD kernels for native MIC (Xeon Phi co-processor)
As MIC supports native (MPI ranks only on MIC) and symmetric (MPI ranks distributed between HOST and MIC) execution t...

03/11/2013

10:02 PM GROMACS Feature #1181: Implementing asymmetric offload to MIC (Xeon Phi Co-processor)
Szilárd Páll wrote:
> That's what I thought, but I am not very familiar with the offloading mechanisms on MIC. Are t...

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